SCT3288
Advanced Baseband Processor
High performance dPMR and DMR baseband processor: integrated 24-bit audio codec, single 3.3 V supply, QFN88 package.
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Block diagrams
SCT3288 is a low power, high performance baseband processor supporting the dPMR and DMR protocols. With an internal codec (audio band ADC and DAC), it completes the entire physical layer and data link layer, and most of the call control layer processing of dPMR and DMR protocols. In dPMR mode it complies with ETSI TS 102 490 and ETSI TS 102 658; in DMR mode it complies with ETSI TS 102 361. The firmware is held on chip: the device answers the host over the slave SPI to signal that it started successfully, then loads and runs the full firmware once it receives the correct command — which makes migration from an analogue radio design straightforward.
Key features
- dPMR protocol engine
- dPMR Tier 1 (ETSI TS 102 490)
- dPMR Tier 2 (ETSI TS 102 658) Mode 1 and Mode 2
- Full Annex A support, with BCD addressing and automatic call match
- DMR protocol engine
- DMR Tier 1 and Tier 2 (ETSI TS 102 361)
- Transmit and receive in slotted or continuous mode
- TDMA direct mode
- 4FSK modem
- 4800 bps for dPMR, 9600 bps for DMR
- Two-point and I/Q modulation
- Automatic frame sync detection, programmable modulation index
- Built-in vocoders
- DVSI AMBE+2™
- Tsinghua University ASELP 1.7
- Optional support for other 2400 / 3600 bps low bit rate vocoders
- Digital and analogue PMR support
- Automatic analogue / digital mode detection on receive
- CTCSS / DCS generation and detection, arbitrary codes and blind detection
- Voice channel filters, pre- and de-emphasis, compander
- Integrated audio codec
- Two-channel 24-bit sigma-delta ADC and DAC with audio PLL
- Two differential input pairs and 2 single-ended inputs, two line output pairs
- Programmable analogue and digital gain
- Host and peripheral interfaces
- Slave SPI to the host; master SPI with two chip selects drives the RF PLL or a transceiver such as SCT3811
- I2S (plus transmit-only and receive-only ports), I2C, UART
- 8 programmable I/O ports
- Single 3.3 V supply
- On-chip DC/DC generates the 1.2 V core supply
- On-chip LDO generates the 3.0 V internal analogue supply
- Crystal or external clock source, plus an on-chip ring oscillator
Typical applications
- Dual mode PMR radios
- Dual mode PMR modules
- FSK data modems